module thopichiiota(
	input	[1599:0]	in,
	output	[1599:0]	out,
	input	[63:0]		c
	);

	assign	out[63:0]		=	(in[63:0]						^	(~{in[403:384],in[447:404]}		&	{in[788:768],in[831:789]}))	^	c; 
	assign	out[127:64]		=	{in[403:384],in[447:404]}		^	(~{in[788:768],in[831:789]}		&	{in[1194:1152],in[1215:1195]});
	assign	out[191:128]	=	{in[788:768],in[831:789]}		^	(~{in[1194:1152],in[1215:1195]}	&	{in[1585:1536],in[1599:1586]});
	assign	out[255:192]	=	{in[1194:1152],in[1215:1195]}	^	(~{in[1585:1536],in[1599:1586]}	&	in[63:0]);	
	assign	out[319:256]	=	{in[1585:1536],in[1599:1586]}	^	(~in[63:0]	&	{in[403:384],in[447:404]});

	assign	out[383:320]	=	{in[227:192],in[255:228]}		^	(~{in[619:576],in[639:620]}		&	{in[700:640],in[703:701]});
	assign	out[447:384]	=	{in[619:576],in[639:620]}		^	(~{in[700:640],in[703:701]}		&	{in[1042:1024],in[1087:1043]});
	assign	out[511:448]	=	{in[700:640],in[703:701]}		^	(~{in[1042:1024],in[1087:1043]}	&	{in[1410:1408],in[1471:1411]});
	assign	out[575:512]	=	{in[1042:1024],in[1087:1043]}	^	(~{in[1410:1408],in[1471:1411]}	&	{in[227:192],in[255:228]});	
	assign	out[639:576]	=	{in[1410:1408],in[1471:1411]}	^	(~{in[227:192],in[255:228]}		&	{in[619:576],in[639:620]});

	assign	out[703:640]	=	{in[126:64],in[127]}			^	(~{in[505:448],in[511:506]}		&	{in[870:832],in[895:871]});
	assign	out[767:704]	=	{in[505:448],in[511:506]}		^	(~{in[870:832],in[895:871]}		&	{in[1271:1216],in[1279:1272]});
	assign	out[831:768]	=	{in[870:832],in[895:871]}		^	(~{in[1271:1216],in[1279:1272]}	&	{in[1325:1280],in[1343:1326]});
	assign	out[895:832]	=	{in[1271:1216],in[1279:1272]}	^	(~{in[1325:1280],in[1343:1326]}	&	{in[126:64],in[127]});	
	assign	out[959:896]	=	{in[1325:1280],in[1343:1326]}	^	(~{in[126:64],in[127]}			&	{in[505:448],in[511:506]});

	assign	out[1023:960]	=	{in[292:256],in[319:293]}		^	(~{in[347:320],in[383:348]}		&	{in[757:704],in[767:758]});
	assign	out[1087:1024]	=	{in[347:320],in[383:348]}		^	(~{in[757:704],in[767:758]}		&	{in[1136:1088],in[1151:1137]});
	assign	out[1151:1088]	=	{in[757:704],in[767:758]}		^	(~{in[1136:1088],in[1151:1137]}	&	{in[1479:1472],in[1535:1480]});
	assign	out[1215:1152]	=	{in[1136:1088],in[1151:1137]}	^	(~{in[1479:1472],in[1535:1480]}	&	{in[292:256],in[319:293]});	
	assign	out[1279:1216]	=	{in[1479:1472],in[1535:1480]}	^	(~{in[292:256],in[319:293]}		&	{in[347:320],in[383:348]});

	assign	out[1343:1280]	=	{in[129:128],in[191:130]}		^	(~{in[520:512],in[575:521]}		&	{in[920:896],in[959:921]});
	assign	out[1407:1344]	=	{in[520:512],in[575:521]}		^	(~{in[920:896],in[959:921]}		&	{in[982:960],in[1023:983]});
	assign	out[1471:1408]	=	{in[920:896],in[959:921]}		^	(~{in[982:960],in[1023:983]}	&	{in[1405:1344],in[1407:1406]});
	assign	out[1535:1472]	=	{in[982:960],in[1023:983]}		^	(~{in[1405:1344],in[1407:1406]}	&	{in[129:128],in[191:130]});	
	assign	out[1599:1536]	=	{in[1405:1344],in[1407:1406]}	^	(~{in[129:128],in[191:130]}		&	{in[520:512],in[575:521]});

endmodule

